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AT86RF231
during Frame Buffer read access the last byte transferred after the PSDU data is the ED value
rather than the LQI value.
Figure 11-8 on page 139 illustrates the packet structure of a High Data Rate Frame Buffer read
access.
Figure 11-8. Packet Structure - High Data Rate Frame Buffer Read Access
byte 1 (command byte)
byte 2 (data byte)
byte 3 (data byte)
byte n-1 (data byte)
byte n (data byte)
MOSI
MISO
0 0 1 reserved[5:0]
PHY_STATUS
XX
PHR[7:0]
XX
PSDU[7:0]
XX
PSDU[7:0]
XX
ED[7:0]
11.3.4
11.3.5
High Data Rate Energy Detection
According to IEEE 802.15.4 the ED measurement duration is 8 symbol periods. For frames
operated at higher data rates the automated ED measurement duration is reduced to 32 μs to
take the reduced frame length into account, refer to Section 8.4 “Energy Detection (ED)” on
page 91 .
During Frame Buffer read access the ED value is appended to the PSDU data, refer to Section
11.3.3 “High Data Rate Frame Buffer Access” on page 138 .
High Data Rate Mode Options
Receiver Sensitivity Control
The different data rates between PPDU header (SHR and PHR) and PHY payload (PSDU)
cause a different sensitivity between header and payload. This can be adjusted by defining sen-
sitivity threshold levels of the receiver. With a sensitivity threshold level set (register bits
RX_PDT_LEVEL > 0), the receiver does not receive frames with an RSSI level below that
threshold. Under these operating conditions the receiver current consumption is reduced by
about 500 μA, refer to Section 12.8 “Current Consumption Specifications” on page 161 parame-
ter 12.8.4.
Enabling receiver sensitivity control with at least RX_PDT_LEVEL = 1 is recommended for the 2
Mb/s rate with a PSDU sensitivity of -89 dBm. In the case of receiving with the default setting of
RX_PDT_LEVEL, a high data rate frame may be detected even if the PSDU sensitivity is above
the received signal strength. In this case the frame is rejected.
A description of the settings to control the sensitivity threshold with register 0x15 (RX_SYN) can
be found in Section 9.1.4 “Register Description” on page 103 .
Reduced Acknowledgment Timing
On higher data rates the IEEE 802.15.4 compliant acknowledgment frame response time of
192 μs significantly reduces the effective data rate of the network. To minimize this influence in
Extended Operating Mode RX_AACK, refer to Section 7.2.3 “RX_AACK_ON - Receive with
Automatic ACK” on page 51 , the acknowledgment frame response time can be reduced to
32 μs. Figure 11-9 on page 140 illustrates an example for a reception and acknowledgement of
a frame with a data rate of 2000 kb/s and a PSDU length of 80 symbols. The PSDU length of the
acknowledgment frame is 5 octets according to IEEE 802.15.4.
139
8111C–MCU Wireless–09/09
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